Microcontrolador Pic16f18456-i/ss Smd

Descrição

Digital Peripherals
• Configurable Logic Cell (CLC):
– Four CLCs
– Integrated combinational and sequential logic
• Complementary Waveform Generator (CWG):
– Three CWGs
– Rising and falling edge dead-band control
– Full-bridge, half-bridge, 1-channel drive
– Multiple signal sources
• Capture/Compare/PWM (CCP) Modules:
– Five CCPs
– 16-bit resolution for Capture/Compare modes
– 10-bit resolution for PWM mode
• Pulse-Width Modulators (PWM):
– Two 10-bit PWMs
• Numerically Controlled Oscillator (NCO):
– Precision linear frequency generator (@50% duty cycle) with 0.0001% step size of source input clock
– Input clock: 0 Hz < fNCO < 32 MHz
– Resolution: fNCO/220
• Serial Communications:
– EUSART
• Two EUSART(s)
• RS-232, RS-485, LIN compatible
• Auto-Baud Detect, Auto-wake-up on Start
– Host Synchronous Serial Port (MSSP)
• Two MSSP(s)
• SPI
• I2C, SMBus and PMBus® compatible
• Data Signal Modulator (DSM):
– Modulates a carrier signal with digital data to create custom carrier synchronized output waveforms
• Up to 26 I/O Pins:
– Individually programmable pull-ups
– Slew rate control
– Interrupt-on-change with edge-select
– Input level selection control (ST or TTL)
– Digital open-drain enable
• Peripheral Pin Select (PPS):
– I/O pin remapping of digital peripherals
• Timer Modules:
– Timer0:
• 8/16-bit timer/counter
• Synchronous or asynchronous operation
• Programmable prescaler/postscaler
• Time base for capture/compare function
– Timer1/3/5 with gate control:
• 16-bit timer/counter
• Programmable internal or external clock sources
• Multiple gate sources
• Multiple Gate modes
• Time base for capture/compare function
– Timer2/4/6 with Hardware Limit Timer:
• 8-bit timers
• Programmable prescaler/postscaler
• Time base for PWM function
• Hardware Limit Timer (HLT) and one-shot extensions
• Selectable clock sources
– Signal Measurement Timer (SMT):
• Two SMT(s)
• 24-bit timer/counter with programmable prescaler
Analog Peripherals
• 12-Bit Analog-to-Digital Converter with Computation (ADC2
):
– Up to 140 ksps
– up to 24 external channels
– Conversion available during Sleep
– Automated post-processing
– Automated math functions on input signals: